GS4900B Datasheet, PDF (75/102 Pages) Semtech Corporation – SD Clock and Timing Generator with GENLOCK

Table 3-13: Configuration and Status Registers (Continued)
Register Name
Constcf_Genlock
RSVD
Video_Cap_Genlock
Address
24h
24h
24h
25h
26h
26h
Bit
15-8
7-3
2-0
–
15-6
5-0
Description
R/W
Crash_Time - controls the crash lock period of video R/W
PLL locking process. This time contributes to the
total PLL Lock Time given in the AC Characteristics
Table.
The time of the crash process in H reference periods
is determined by [Crash_Time x 4] + 1.
The default value of these bits will vary depending
on the output video standard selected.
Reference: Section 3.6.1 on page 49
Lock_Lost_Threshold - controls the threshold of the R/W
lock indication circuit. A larger value programmed
in this register can increase the stability of the
LOCK_LOST output signal when the input H
reference signal is subject to large amounts of low
frequency jitter. A larger value in this register will
also increase the lock indication time, although not
the actual lock time of the device.
The default value of these bits will vary depending
on the output video standard selected.
Run_Window - controls the output frequency error R/W
in the case of a missing or mis-timed H reference
transition. The default value of this register allows
the device to maintain genlock through one missing
input H pulse.
This feature can be disabled by programming
Run_Window = 000b. In this case, the device will
immediately react to any disturbance of the input H
signal.
The default value of these bits will vary depending
on the output video standard selected.
Reference: Section 3.5.3 on page 45
Reserved.
–
Reserved. Set these bits to zero when writing to
–
26h.
Control signal to adjust loop bandwidth of video
R/W
genlock block.
The value programmed in this register must be
between 10 and Video_Res_Genlock - 21.
The default value of this register will vary
depending on the output video standard selected.
Reference: Section 3.6.2 on page 49
Default
–
–
–
–
–
–
GS4901B/GS4900B SD Clock and Timing Generator
with GENLOCK
Data Sheet
37703 - 4
December 2009
75 of 102