LC87F06J2A Datasheet, PDF (26/32 Pages) Sanyo Semicon Device – CMOS IC FROM 192K byte, RAM 8192 byte on-chip 8-bit 1-chip Microcontroller

LC87F06J2A
Characteristics of a Sample Main System Clock Oscillation Circuit
Given below are the characteristics of a sample main system clock oscillation circuit that are measured using a
SANYO-designated oscillation characteristics evaluation board and external components with circuit constant values
with which the oscillator vendor confirmed normal and stable oscillation
Table 1 Characteristics of a Sample Main System Clock Oscillator Circuit with a Ceramic Oscillator
Nominal
Frequency
Vendor
Name
Oscillator Name
Circuit Constant
C1
C2
Rd1
Operating
Voltage
Range
Oscillation
Stabilization Time
typ
max
Remarks
[pF]
[pF]
[Ω]
[V]
[ms]
[ms]
15MHz
MURATA CSTCE15M0V53-R0
(15)
(15)
470
3.0 to 5.5
0.1
0.5
Internal C1, C2
SMD-type
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized in
follwing cases (see Figure 4).
• The time interval that is required for the oscillation to get stabilized after VDD goes above the operating voltage lower
limit.
• The time interval that is required for the oscillation to get stabilized after the instruction for starting the mainclock
oscillation circuit is executed.
• The time interval that is required for the oscillation to get stabilized after the HOLD mode is reset and ocsillation is
started.
• The time interval that is required for the oscillation to get stabilized after the X'tal Hold mode, under the state which
the CFSTOP (bit 0 of the OCR register) = 0, is reset and ocsillation is started.
Characteristics of a Sample Subsystem Clock Oscillator Circuit
Given below are the characteristics of a sample subsystem clock oscillation circuit that are measured using a SANYO-
designated oscillation characteristics evaluation board and external components with circuit constant values with which
the oscillator vendor confirmed normal and stable oscillation.
Table 2 Characteristics of a Sample Subsystem Clock Oscillator Circuit with a Crystal Oscillator
Circuit Constant
Nominal
Oscillator
Vendor Name
Frequency
Name
C3
C4
Rf1
Rd2
Operating
Voltage
Range
Oscillation
Stabilization Time
typ
max
Remarks
[pF]
[pF]
[Ω]
[Ω]
[V]
[s]
[s]
EPSON
32.768kHz
MC-306
18
TOYOCOM
18
OPEN 560k
2.2 to 5.5
Applicable
1.3
3.0
CL value = 12.5pF
SMD-type
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized in
follwing cases (see Figure 4).
• The time interval that is required for the oscillation to get stabilized after VDD goes above the operating voltage lower
limit.
• The time interval that is required for the oscillation to get stabilized after the instruction for starting the subclock
oscillation circuit is executed.
• The time interval that is required for the oscillation to get stabilized after the Hold mode, under the state which the
EXTOSC (bit 6 of the OCR register) = 1, is reset and ocsillation is started.
• The time interval that is required for the oscillation to get stabilized after the Hold mode, under the state which the
DMSRUN (bit 7 of the DMSCNT register) = 1, is reset and ocsillation is started.
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