LC78626E Datasheet, PDF (21/32 Pages) Sanyo Semicon Device – DSP for Compact Disk Players

LC78626E
10 The Subcode Q Output Circuit Pin 66: WRQ, Pin 62: RWC, Pin 65: SQOUT, Pin 64: CQCK, Pin 15 CS
Code
$09
$89
COMMAND
ADDRESS FREE
ADDRESS 1
RES = low
q
It is possible to read the subcode Q from the SQOUT pin by inputting a clock into the CQCK pin. Of the 8-bit
subcodes, the “Q” signal is useful in accessing musical selections, in displays, etc. WRQ is only high when the CRC
has been passed and the address in the subcode Q format is “1.” (See Note 1.) When the microcontroller detects this
high level, it can transmit a CQCK signal to read the data from SQOUT in the order shown below. When the CQCK
transmission begins, data changes in the internal registers of the DSP are inhibited. Once the microcontroller has
completed its read, RWC temporarily goes high, enabling data updating. At this time, WRQ goes low. Because WRQ
goes low after being high for 11.2 ms, the CQCK input starts during the interval when WRQ is high. The data can be
read beginning with the least significant bit.
Note 1: This conditions is ignored if an address-free command is sent (corresponding to the CDV).
CONT
ADR
TNO
INDEX (POINT)
MIN
SEC
FRAME
ZERO
AMIN (PMIN)
ASEC (PSEC)
AFRAME (PFRAME)
The items within the parentheses are for the read-in area.
Sub Q data
* The WRQ pin normally indicates the subcode Q standby; however, when in the track counter mode and when there is
an internal bake, it becomes a different monitor. (See the track count and internal brake items.)
* This IC becomes active when the CS pin is low, and the subcode Q data is output from the SQOUT pin. When the CS
pin is high, the SQOUT pin enters a high impedance state.
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