K4S280832K Datasheet, PDF (9/15 Pages) Samsung semiconductor – 128Mb K-die SDRAM Specification

K4S280832K
K4S281632K
Synchronous DRAM
11.0 DC Characteristics (x8)
(Recommended operating condition unless otherwise noted, T_A = 0 to 70°C)
Parameter
Symbol
Test Condition
Version
75
Unit Note
Operating current
(One bank active)
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
90
mA
1
Precharge standby current in ^{ICC2P CKE ≤ VIL(max), tCC = 10ns}
power-down mode
ICC2PS CKE & CLK ≤ V_IL(max), tCC = ∞
2
mA
2
Precharge standby current in
ICC2N
CKE ≥ V_IH(min), CS ≥ V_IH(min), tCC = 10ns
Input signals are changed one time during 20ns
20
non power-down mode
ICC2NS ^{CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞}
10
mA
Input signals are stable
Active standby current in
power-down mode
ICC3P CKE ≤ V_IL(max), tCC = 10ns
ICC3PS CKE & CLK ≤ V_IL(max), tCC = ∞
5
mA
5
Active standby current in
ICC3N ^{CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns}
Input signals are changed one time during 20ns
30
mA
non power-down mode
(One bank active)
ICC3NS
CKE ≥ V_IH(min), CLK ≤ V_IL(max), tCC = ∞
Input signals are stable
25
mA
Operating current
(Burst mode)
ICC4
IO = 0 mA
Page burst
110
mA
1
Refresh current
ICC5 tRC ≥ tRC(min)
200
mA
2
Self refresh current
ICC6 CKE ≤ 0.2V
C
2
mA
3
L
800
uA
4
Notes : 1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S280832K-UC
4. K4S280832K-UL
5. Unless otherwise noted, input swing IeveI is CMOS(V_IH /V_IL=V_DDQ/V_SSQ)
9 of 15
Rev. 1.23 March 2009