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K4S280832K Datasheet, PDF (10/15 Pages) Samsung semiconductor – 128Mb K-die SDRAM Specification
K4S280832K
K4S281632K
Synchronous DRAM
12.0 DC Characteristics (x16)
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
Parameter
Symbol
Test Condition
Version
50
60
75
Unit Note
Operating current
(One bank active)
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
ICC2P CKE ≤ VIL(max), tCC = 10ns
ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC2N CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2NS CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
140 130 100 mA
1
2
mA
2
20
mA
10
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
ICC3P CKE ≤ VIL(max), tCC = 10ns
ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞
ICC3N CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC3NS CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
5
mA
5
30
mA
25
mA
Operating current
(Burst mode)
Refresh current
IO = 0 mA
ICC4 Page burst 4Banks Activated
tCCD = 2CLKs
ICC5 tRC ≥ tRC(min)
160 150 140 mA
1
230 220 200 mA
2
Self refresh current
ICC6 CKE ≤ 0.2V
C
2
mA
3
L
800
uA
4
Notes : 1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S281632K-UC
4. K4S281632K-UL
5. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ)
10 of 15
Rev. 1.23 March 2009