K4S281633D-RL Datasheet, PDF (8/10 Pages) Samsung semiconductor – 8Mx16 SDRAM 54CSP

K4S281633D-RL(N)
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
Parameter
Symbol
CLK cycle time
CAS latency=3
CAS latency=2 tC C
CAS latency=1
CAS latency=3
CLK to valid output delay CAS latency=2 tSAC
CAS latency=1
CAS latency=3
Output data hold time
CAS latency=2 ^tOH
CAS latency=1
CLK high pulse width
tC H
CLK low pulse width
tC L
Input setup time
tS S
Input hold time
tSH
CLK to output in Low-Z
tSLZ
CAS latency=3
CLK to output in Hi-Z
CAS latency=2 tSHZ
CAS latency=1
- 75
Min
Max
7.5
10
1000
-
5.4
7
-
2.5
2.5
-
2.5
2.5
2.0
1.0
1
5.4
7
-
-1H
Min
Max
10
10
1000
-
7
7
-
2.5
2.5
-
3
3
2.5
1.5
1
7
7
-
Preliminary
CMOS SDRAM
-1L
Min
Max
10
12
1000
25
7
8
20
2.5
2.5
2.5
3
3
2.5
1.5
1
7
8
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1
1,2
2
3
3
3
3
2
Notes : _{1. Parameters depend on programmed CAS latency.}
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Rev. 0.6 Nov. 2001