MC56U032DCCA Datasheet, PDF (61/64 Pages) Samsung semiconductor – Dual Voltage MultiMediaCard Specification

MultiMediaCard^TM
Figure 4-17 Timing diagram: Single block read transaction
• Multiple Block Read - Stop Transmission is sent between blocks
The timing for de-asserting the CS signal after the last card response is identical to a standard
command/ response transaction
Figure 4-18 Timing diagram: Multiple block transaction, Stop transmission does not overlap data
• Multiple Block Read - Stop Transmission is sent within a block
In an Open-ended (or host aborted) multiple block read transaction the stop transmission command may
be sent asynchronously to the data transmitted out of the card and may overlap the data block. In this
case the card will stop sending the data and transmit the response token as well. The delay between
command and response is standard NCR Clocks. The first byte, however, is not guaranteed to be all set
to ‘1’. The card is allowed up to two clocks to stop data transmission.
The timing for de-asserting the CS signal after the last card response is identical to a standard
command/ response transaction
Figure 4-19 Timing diagram: Multiple block transaction, Stop transmission overlaps data
• Reading the CSD register
The following timing diagram describes the SEND_CSD command bus transaction. The time-out values
between the response and the data block is NCX (Since the NAC is still unknown).
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