MC56U032DCCA Datasheet, PDF (59/64 Pages) Samsung semiconductor – Dual Voltage MultiMediaCard Specification

MultiMediaCard^TM
Error
Illegal
Command
Card ECC
Failed
CC Error
Error
WP Erase Skip
R1 R2 E R
R2
DataErr
R2
DataErr
R2
DaraErr
R2
EX
ERX
ERX
SX
Lock/Unlock
Command
Card is locked
R2
EX
R2
SX
DaraErr
Erase Retest
R1 R2 S R
In Idle State
R1 R2 S R
CSD Overwrite R2
EX
‘1’ = error
‘0’ = no error
‘1’ = error
‘0’ = success
‘1’ = failure
‘0’ = no error
‘1’ = error
‘0’ = no error
‘1’ = error
‘0’ = not
protected
‘1’ = protected
‘0’ = no error
‘1’ = error
‘0’ = card is
not locked
‘1’ = card is
locked
‘0’ = cleared
‘1’ = set
‘0’ = Card is
ready
‘1’ = protected
‘0’ = no error
‘1’ = error
command failed.
Command not legal for the card C
state.
Card internal ECC was applied C
but failed to correct the data.
Internal card controller error.
C
A general or an unknown error C
occurred during the operation.
Only partial address space was C
erased due to existing WP
blocks.
Sequence or password error
C
during card lock/unlock
operation.
Card is locked by password.
A
An erase sequence was cleared C
before exciting because an
output of erase sequence
command was received.
The card enters the idle state A
after power up or reset
command. It will exit this state
and become ready upon
completion of this initialization
procedures.
The host is trying to change the C
ROM section, or is trying to
reserve the copy bit (set as
original) or permanent WP bit
(unprotected) or the CSD
register.
4.11 SPI Bus Timing
All timing diagrams use the following schematics and abbreviations:
H
L
X
Z
*
busy
Command
Response
Data block
Signal is high (logical ‘1’)
Transmitter bit (Host = ‘1’, Card = ‘0’)
One-cycle pull-up (= ‘1’)
High impedance state (-> = ‘1’)
Repetition
Busy token
Command token
Response token
Data token
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