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MC56U032DCCA Datasheet, PDF (21/64 Pages) Samsung semiconductor – Dual Voltage MultiMediaCard Specification
MultiMediaCardTM
4.5.3 Relative Card Address (RCA)
The 16-bit relative card address register carries the card address assigned by the host during the card
identification. This address is used for the addressed host to card communication after the card
identification procedure. The default value of the RCA register is 0x0001. The value 0x0000 is reserved
to set all cards in Standby State with the command SELECT_DESELECT_CARD (CMD7). The RCA is
programmed with the command SET_RELATIVE_ADDRESS (CMD3) during the initialization
procedure. The content of this register is lost after power down. The default value is assigned when an
internal reset is applied by the power up detection unit of the MultiMediaCard.
4.5.4 Card Specific Data (CSD)
The card specific data register describes how to access the card content. The CSD defines card
operating parameters like maximum data access time, data transfer speed.
Table 4-7 CSD Field
Name
CSD structure
Spec version
Reserved
Data read access-
time-1
Data read access-
time-2 in CLK
cycles NAC*100)
Max. data transfer
rate
Card command
classes
Max. read data
block length
Partial blocks for
read allowed
Write block
misalignment
Read block
misalignment
DSR implemented
Reserved
Device size
Max. read current
at VDD min
Max. read current
at VDD max
Max. write current
at VDD min
Max. write current
at VDD max
Field
CSD_STRUCTURE
SPEC_VERS
--
TAAC
NSAC
Width
2
4
2
8
8
CSD-slice
[127:126]
[125:122]
[121:120]
[119:112]
[111:104]
Value
0x2
0x3
0x0
0ƒ26
(1.5 ms)
0ƒ01
(100 cycles)
Type
read only
read only
read only
read only
read only
TRAN_SPEED
CCC
READ_BL_LEN
8
[103:96]
0ƒ2A
read only
(20MHz,Max)
12
[95:84]
0ƒ0F5
read only
(Class 0,2,4,5, 6, 7)
4
[83:80]
0ƒ9(512 bytes)
read only
READ_BL_PARTIAL
1
[79:79]
0x0(Disabled)
read only
WRITE_BLK_MISALIGN 1
[78:78]
0x0(Disabled)
read only
READ_BLK_MISALIGN 1
[77:77]
0x0 (Disabled)
read only
DSR_IMP
1
[76:76]
0x0 (Disabled)
read only
--
C_SIZE
2
[75:74]
0x0
12
[73:62]
*1
read only
read only
VDD_R_CURR_MIN
3
[61:59]
*2
read only
VDD_R_CURR_MAX
3
[58:56]
*2
read only
VDD_W_CURR_MIN
3
VDD_W_CURR_MAX
3
[55:53]
*2
[52:50]
*2
read only
read only
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