S8S3122X16 Datasheet, PDF (4/44 Pages) Samsung semiconductor – 256K x 16 SDRAM

S8S3122X16
128K x 16Bit x 2 Banks Synchronous DRAM
CMOS SDRAM
FEATURES
• 3.3V power supply
• LVTTL compatible with multiplexed address
• Dual banks operation
• MRS cycle with address key programs
-. CAS Latency ( 2 & 3)
-. Burst Length (1, 2, 4, 8 & full page)
-. Burst Type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system
clock
• Burst Read Single-bit Write operation
• DQM for masking
• Auto & self refresh
• 15.6us refresh duty cycle (1K/16ms)
GENERAL DESCRIPTION
The S8S3122X16 is 4,194,304 bits synchronous high data rate
Dynamic RAM organized as 2 x131,072 words by 16 bits, fabri-
cated with SAMSUNG′s high performance CMOS technology.
Synchronous design allows precise cycle control with the use of
system clock I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst length
and programmable latencies allow the same device to be useful
for a variety of high bandwidth, high performance memory sys-
tem applications.
ORDERING INFORMATION
Part NO.
S8S3122X16-TCR2
S8S3122X16-TCR1
MAX Freq.
100MHz(CL2)
100MHz(CL3)
Interface
LVTTL
Package
50
TSOP(II)
FUNCTIONAL BLOCK DIAGRAM
Bank Select
Data Input Register
LWE
LDQM
128K x 16
CLK
ADD
128K x 16
Column Decoder
LCKE
LRAS
LCBR
LWE
LCAS
Latency & Burst Length
Programming Register
LWCBR
Timing Register
DQi
LDQM
CLK
CKE
CS
RAS
CAS
WE L(U)DQM
* Samsung Electronics reserves the right to
change products or specification without
notice.
Ver 0.0 Sep. '01