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K4T1G044QC Datasheet, PDF (23/26 Pages) Samsung semiconductor – 1Gb C-die DDR2 SDRAM Specification | |||
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K4T1G044QC
K4T1G084QC
DDR2 SDRAM
âtDS1, âtDH1 Derating Values for DDR2-400, DDR2-533(All units in âpsâ; the note applies to the entire table)
DQS Single-ended Slew Rate
2.0 V/ns
1.5 V/ns
1.0 V/ns
0.9 V/ns
0.8 V/ns
0.7 V/ns
0.6 V/ns
0.5 V/ns
0.4 V/ns
âtDS âtDH âtDS âtDH âtDS âtDH âtDS âtDH âtDS âtDH âtDS âtDH âtDS âtDH âtDS âtDH âtDS âtDH
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2.0 188 188 167 146 125 63
-
-
-
-
-
-
-
-
-
-
-
-
1.5 146 167 125 125 83 42 81 43
-
-
-
-
-
-
-
-
-
-
1.0 63 125 42 83 0
0
-2
1
-7 -13 -
-
-
-
-
-
-
-
DQ 0.9 -
-
31 69 -11 -14 -13 -13 -18 -27 -29 -45
-
-
-
-
-
-
Slew
rate
0.8
-
-
-
- -25 -31 -27 -30 -32 -44 -43 -62 -60 -86 -
-
-
-
V/ns 0.7 -
-
-
-
-
- -45 -53 -50 -67 -61 -85 -78 -109 -108 -152 -
-
0.6 -
-
-
-
-
-
-
- -74 -96 -85 -114 -102 -138 -138 -181 -183 -246
0.5 -
-
-
-
-
-
-
-
-
- -128 -156 -145 -180 -175 -223 -226 -288
0.4 -
-
-
-
-
-
-
-
-
-
-
- -210 -243 -240 -286 -291 -351
For all input signals the total tDS (setup time) and tDH (hold time) required is calculated by adding the data sheet tDS(base) and tDH(base) value to the
âtDS and âtDH derating value respectively. Example: tDS (total setup time) = tDS(base) + âtDS.
23 of 26
Rev. 1.1 June 2007
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