K4T1G044QF Datasheet, PDF (15/46 Pages) Samsung semiconductor – 1Gb F-die DDR2 SDRAM

K4T1G044QF
K4T1G084QF
K4T1G164QF
datasheet
Rev. 1.11
DDR2 SDRAM
9. OCD default characteristics
Description
Parameter
Output impedance
Output impedance step size for OCD calibration
Pull-up and pull-down mismatch
Output slew rate
Sout
Min
Nom
Max
18ohm at norminal condition
See full strength default driver characteristics
on device operation specification
0
1.5
0
4
1.5
5
Unit
ohm
ohm
ohm
V/ns
NOTE
1,2
6
1,2,3
1,4,5,6,7,8
NOTE :
1. Absolute Specifications (0°C ≤ T_CASE ≤ +95°C; V_DD = +1.8V ±0.1V, V_DDQ = +1.8V ±0.1V)
2. Impedance measurement condition for output source DC current: V_DDQ = 1.7V; V_OUT = 1420mV; (V_OUT-V_DDQ)/Ioh must be less than 23.4 ohms for values of V_OUT
between V_DDQ and V_DDQ- 280mV. Impedance measurement condition for output sink dc current: V_DDQ = 1.7V; V_OUT = 280mV; V_OUT/Iol must be less than 23.4 ohms for
values of V_OUT between 0V and 280mV.
3. Mismatch is absolute value between pull-up and pull-down, both are measured at same temperature and voltage.
4. Slew rate measured from V_IL(AC) to V_IH(AC).
5. The absolute value of the slew rate as measured from DC to DC is equal to or greater than the slew rate as measured from AC to AC. This is
guaranteed by design and characterization.
6. This represents the step size when the OCD is near 18 ohms at nominal conditions across all process and represents only the DRAM uncertainty.
Output slew rate load :
V_TT
Output
(V_OUT)
25 ohm
Reference
Point
7. DRAM output slew rate specification applies to 667Mb/sec/pin and 800Mb/sec/pin speed bins.
8. Timing skew due to DRAM output slew rate mismatch between DQS / DQS and associated DQ is included in tDQSQ and tQHS specification.
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