DS_S1M8837 Datasheet, PDF (14/29 Pages) Samsung semiconductor – FRACTIONAL-N RF/INTEGER-N IF DUAL PLL

S1M8836/37
FRACTIONAL-N RF/INTEGER-N IF DUAL PLL
Programming Description
The S1M8836/37 can be programmed via the serial bus interface. The interface is made of 3 functional signals:
clock, data, and latch enable(LE). Serial data is moved into the 22-bit shift register on the rising edge of the
clock. These data enters MSB first. When LE goes HIGH, data in the shift register is moved into one of the 4
latches (by the 2-bit control).
MSB
Data Flow (MSB First)
DATA[21:2]
LSB
CTL[1:0]
Control Bit Map (CTL[1:0])
CTL2(CTL[1])
Control Bits
0
0
1
1
CTL1(CTL[0])
0
1
0
1
DATA Location
WORD1
WORD2
WORD3
WORD4
Data Bit Map (DATA[21:2])
First Bit
REGISTER BIT LOCATION
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6
WORD1(W1) IF_CTL_ RF_R
WORD (2Bit)
IF _R_CNTR(15Bit)
WORD2(W2) CMOS IF_CP_
WORD
IF_NB_CNTR(12Bit)
WORD3(W3) FoLD(4Bit)
RF_CP_WORD
RF_NB_CNTR(7Bit)
WORD4(W4) RF_CTL_
WORD
FRAC_CNTR(17Bit)
Last Bit
543210
00
IF_NA_ 0 1
CNTR(3Bit)
RF_NA_CNTR 1 0
(36:3Bit)
RF_NA_CNTR
(37:4Bit)
11
14