MDO4000B Datasheet, PDF (17/28 Pages) List of Unclassifed Manufacturers – Mixed Domain Oscilloscopes

Trigger system
Trigger sensitivity
Internal DC coupled
Trigger source
1 MΩ path (all models)
50 Ω path (≤500 MHz models)
50 Ω path (1 GHz models)
Mixed Domain Oscilloscopes — MDO4000B Series
Sensitivity
For 1 mV/div to 4.98 mV/div; 0.75 div from DC to 50 MHz,
increasing to 1.3 div at rated bandwidth
For ≥5 mV/div; 0.4 div from DC to 50 MHz, increasing to 1 div at
rated bandwidth
0.4 div from DC to 50 MHz, increasing to 1 div at rated
bandwidth
Trigger level ranges
Any input channel
Line
Trigger frequency readout
Trigger types
Edge
Sequence (B-trigger)
Pulse Width
Timeout
Runt
Logic
Setup and Hold
Rise/Fall Time
Video
Extended Video (optional)
I²C (optional)
SPI (optional)
RS-232/422/485/UART
(optional)
USB: Low speed (optional)
±8 divisions from center of screen, ±8 divisions from 0 V when vertical LF reject trigger coupling is selected
The line trigger level is fixed at about 50% of the line voltage.
Provides 6-digit frequency readout of triggerable events.
Positive or negative slope on any channel. Coupling includes DC, AC, HF reject, LF reject, and noise reject.
Trigger Delay by Time: 4 ns to 8 s. Or Trigger Delay by Events: 1 to 4,000,000 events.
Trigger on width of positive or negative pulses that are >, <, =, ≠, or inside/outside a specified period of time.
Trigger on an event which remains high, low, or either, for a specified time period (4 ns to 8 s).
Trigger on a pulse that crosses one threshold but fails to cross a second threshold before crossing the first again.
Trigger when any logical pattern of channels goes false or stays true for specified period of time. Any input can be used as a clock
to look for the pattern on a clock edge. Pattern (AND, OR, NAND, NOR) specified for all input channels defined as High, Low, or
Don’t Care.
Trigger on violations of both setup time and hold time between clock and data present on any of the analog and digital input
channels.
Trigger on pulse edge rates that are faster or slower than specified. Slope may be positive, negative, or either.
Trigger on all lines, odd, even, or all fields on NTSC, PAL, and SECAM video signals.
Trigger on 480p/60, 576p/50, 720p/30, 720p/50, 720p/60, 875i/60, 1080i/50, 1080i/60, 1080p/24, 1080p/24sF, 1080p/25, 1080p/
30, 1080p/50, 1080p/60, and custom bi-level and tri-level sync video standards.
Trigger on Start, Repeated Start, Stop, Missing ACK, Address (7 or 10 bit), Data, or Address and Data on I²C buses up to 10 Mb/s.
Trigger on SS active, Start of Frame, MOSI, MISO, or MOSI and MISO on SPI buses up to 50.0 Mb/s.
Trigger on Tx Start Bit, Rx Start Bit, Tx End of Packet, Rx End of Packet, Tx Data, Rx Data, Tx Parity Error, and Rx Parity Error up
to 10 Mb/s.
Trigger on Sync Active, Start of Frame, Reset, Suspend, Resume, End of Packet, Token (Address) Packet, Data Packet,
Handshake Packet, Special Packet, Error.
Token packet trigger - Any token type, SOF, OUT, IN, SETUP; Address can be specified for Any Token, OUT, IN, and SETUP
token types. Address can be further specified to trigger on ≤, <, =, >, ≥, ≠ a particular value, or inside or outside of a range. Frame
number can be specified for SOF token using binary, hex, unsigned decimal and don't care digits.
Data packet trigger - Any data type, DATA0, DATA1; Data can be further specified to trigger on ≤, <, =, >, ≥, ≠ a particular data
value, or inside or outside of a range.
Handshake packet trigger - Any handshake type, ACK, NAK, STALL.
Special packet trigger - Any special type, Reserved
Error trigger - PID Check, CRC5 or CRC16, Bit Stuffing.
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