BU92747XXX Datasheet, PDF (34/46 Pages) Rohm – IrDA Controller LSI built-in Ir remote control

BD92747XXX
Datasheet
Address 2Ah (Write)
Description
D0
(Rst)
Remote control Reset
Initial
value
Operation
0: Normal operation
1: Reset. When the condition of serial bus is STOP, this bit is set “0”.
0
The operation of this bit must not do with the operation of another
address. This operation must be realized by accessing only this
address on a sequence of the data transmission of serial (from
START condition to STOP condition).
Address 2Bh (Write)
Description
DO Selection of forwarding
(Regs) to transmission buffer
Initial
value
Operation
Transmitting from output data register to transmission buffer only
once or repeatedly
0: 128 bits data in Out0~Out15 is forwarded to transmission buffer
only once. Then data bit length that is specified by BitLen is
outputted to IrRC (or IrTX), and End part is outputted to IrRC (or
0
IrTX) pin.
1: It is repeated that 128 bits data in Out0~Out15 is forwarded to
transmission buffer. After 128 bits data of transmission buffer is
outputted to IrRC (or IrTX), 128 bits data of Out0~Out15 is
forwarded to transmission buffer and the data of transmission
buffer is outputted to IrRC (or IrTX) again.
Address 2Ch-3Fh
Reserved.
●INTERRUPT FUNCTION
Opm=0
The period of transmitting data
Transmitting next data
NIRQ
Internal
interrupt
Irqe=1
Send=1
Irqc=1
Send=1
Setting data and ^{Setting next data and The interrupt is generated}
output format.
next output format. because transmission buffer is null.
When transmission buffer is null, internal interrupt is generated.
After the reset is canceled, transmission buffer becomes null.
When Send bit is set to “1”, the setting data is forwarded to the transmission buffer, and starts the transmission in
IrRC (or IrTX) pin.
When the data is forward to the transmission buffer, the interrupt is cleared.
Also, when Irqc bit is set “1”, the interrupt is cleared.
When Irqe bit is set “1”, NIRQ pin outputs the interrupt condition because the internal interrupt is permitted.
When Irqe bit is set “0”, NIRQ pin outputs “HIGH” because the internal interrupt is masked.
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TSZ22111・15・001
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TSZ02201-0E4E0F100020-1-2
24. June. 2015 Rev.001