H8S2194 Datasheet, PDF (939/1078 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Instruction H N Z V C
SHAL
⎯
SHAR
⎯
0
SHLL
⎯
0
SHLR
⎯0
0
SLEEP
STC
STM
STMAC
SUB
⎯⎯⎯⎯⎯
⎯⎯⎯⎯⎯
⎯⎯⎯⎯⎯
Cannot be used in this LSI.
SUBS
SUBX
⎯⎯⎯⎯⎯
TAS
TRAPA
XOR
XORC
⎯
0
⎯
⎯⎯⎯⎯⎯
⎯
0
⎯
Appendix A Instruction Set
Definition
N=Rm
Z=Rm⋅Rm-1⋅ ‚‚‚‚‚‚ ⋅R0
V = Dm · Dm–1 + Dm · Dm−1 (In case of 1-bit)
V = Dm · Dm–1 · Dm–2 · Dm · Dm−1 · Dm−2
(In case of 2-bit)
C=Dm(In case of 1 bit), C=Dm-1(In case of 2 bits)
N=Rm
Z=Rm⋅Rm-1⋅ ‚‚‚‚‚‚ ⋅R0
C=D0(In case of 1 bit), C=D1(In case of 2 bits)
N=Rm
Z=Rm⋅Rm-1⋅ ‚‚‚‚‚‚ ⋅R0
C=Dm(In case of 1 bit), C=Dm-1(In case of 2 bits)
N=Rm
Z=Rm⋅Rm-1⋅ ‚‚‚‚‚‚ ⋅R0
C=D0(In case of 1 bit), C=D1(In case of 2 bits)
H=Sm-4⋅Dm-4+Dm-4⋅Rm-4+Sm-4⋅Rm-4
N=Rm
Z=Rm⋅Rm-1⋅ ‚‚‚‚‚‚ ⋅R0
V=Sm⋅Dm⋅Rm+Sm⋅Dm⋅Rm
C=Sm⋅Dm+Dm⋅Rm+Sm⋅Rm
H=Sm-4⋅Dm-4+Dm-4⋅Rm-4+Sm-4⋅Rm-4
N=Rm
Z=Z'⋅Rm⋅ ‚‚‚‚‚‚ ⋅R0
V=Sm⋅Dm⋅Rm+Sm⋅Dm⋅Rm
C=Sm⋅Dm+Dm⋅Rm+Sm⋅Rm
N=Dm
Z=Dm⋅Dm-1⋅ ‚‚‚‚‚‚ ⋅D0
N=Rm
Z=Rm⋅Rm-1⋅ ‚‚‚‚‚‚ ⋅R0
Value in the bit corresponding to execution result
is stored. No flag change when EXR.
Rev.3.00 Jan. 10, 2007 page 903 of 1038
REJ09B0328-0300