H8S2194 Datasheet, PDF (746/1078 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 28 Servo Circuits
Bit 5⎯Capstan Phase Correction Auto/Manual Selection Bit (AT/MU): Selects whether the
generation of the correction reference signal (CAPREF30) for capstan phase control is controlled
automatically or manually depending on the status of the ASM and REC/PB bits of the CTL mode
register.
Bit 5
AT/MU
0
1
Description
Manual mode
Auto mode
(Initial value)
Bit 4⎯Capstan Phase Correction Register Selection Bit (TRK/X): Determines the method to
generate the CAPREF30 signal when the AT/MU bit is 0.
Bit 4
TRK/X
0
1
Description
Generates CAPREF30 only by the set value of XDR
Generates CAPREF30 by the set values of XDR and TRDR
(Initial value)
Bit 3⎯Reference Signal Selection Bit (EXC/REF): Selects the reference signal to generate the
correction reference signal (CAPREF30).
Bit 3
EXC/REF
0
1
Description
Generates the signal based on REF30P
Generates the signal based on the external reference signal
(Initial value)
Bit 2⎯Clock Source Selection Bit (XCS): Selects the clock source to be supplied to the 10-bit
counter.
Bit 2
XCS
0
1
Description
φs
φs/2
(Initial value)
Rev.3.00 Jan. 10, 2007 page 710 of 1038
REJ09B0328-0300