H8S2194 Datasheet, PDF (129/1078 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 5 Exception Handling
Vector Internal Fetch of first program
fetch processing instruction
φ
RES
Internal address bus
(1)
(3)
Internal read signal
Internal write signal
Internal data bus
High level
(2)
(4)
(1) : Reset exception vector address ((1) = H'0000 or H'000000)
(2) : Start address (contents of reset exception vector address)
(3) : Start address ((3) = (2))
(4) : First program instruction
Figure 5.2 Reset Sequence (Mode 1)
5.2.3 Interrupts after Reset
If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. Since the first instruction of a program is
always executed immediately after the reset state ends, make sure that this instruction initializes
the stack pointer (example: MOV.L #xx:32, SP).
Rev.3.00 Jan. 10, 2007 page 93 of 1038
REJ09B0328-0300