H8S2378 Datasheet, PDF (897/1203 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series

Section 20 Flash Memory (0.35-µm F-ZTAT Version)
Section 20 Flash Memory (0.35-µm F-ZTAT Version)
The features of the flash memory included in the flash memory version are summarized below.
The block diagram of the flash memory is shown in figure 20.1.
20.1 Features
• Size
Product Classification
H8S/2377
HD64F2377
H8S/2377R
HD64F2377R
ROM Size
384 kbytes
ROM Address
H'000000 to H'05FFFF (Modes 3, 4, and 7)
• Programming/erase methods
The flash memory is programmed 128 bytes at a time. Erase is performed in single-block
units. The flash memory of 384 kbytes is configured as follows: 64 kbytes × 5 blocks, 32
kbytes × 1 block, and 4 kbytes × 8 blocks. To erase the entire flash memory, each block must
be erased in turn.
• Reprogramming capability
The flash memory can be reprogrammed up to 100 times.
• Two on-board programming modes
Boot mode
User program mode
On-board programming/erasing can be done in boot mode in which the on-chip boot program
is started for erase or programming of the entire flash memory. In normal user program mode,
individual blocks can be erased or programmed.
• Programmer mode
Flash memory can be programmed/erased in programmer mode, using a PROM programmer,
as well as in on-board programming mode.
• Automatic bit rate adjustment
With data transfer in boot mode, the bit rate of this LSI can be automatically adjusted to match
the transfer bit rate of the host.
• Programming/erasing protection
There are three protect modes, hardware, software, and error protect, which allow protected
status to be designated for flash memory program/erase operations.
ROMF251A_010020020400
Rev. 6.00 Jul 19, 2006 page 833 of 1136
REJ09B0109-0600