H8S2378 Datasheet, PDF (645/1203 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series

Section 11 16-Bit Timer Pulse Unit (TPU)
11.3.6 Timer Counter (TCNT)
The TCNT registers are 16-bit readable/writable counters. The TPU has six TCNT counters, one
for each channel.
The TCNT counters are initialized to H'0000 by a reset, or in hardware standby mode.
The TCNT counters cannot be accessed in 8-bit units; they must always be accessed as a 16-bit
unit.
11.3.7 Timer General Register (TGR)
The TGR registers are 16-bit readable/writable registers with a dual function as output compare
and input capture registers. The TPU has 16 TGR registers, four each for channels 0 and 3 and two
each for channels 1, 2, 4, and 5. TGRC and TGRD for channels 0 and 3 can also be designated for
operation as buffer registers. The TGR registers cannot be accessed in 8-bit units; they must
always be accessed as a 16-bit unit. TGR buffer register combinations are TGRA–TGRC and
TGRB–TGRD.
11.3.8 Timer Start Register (TSTR)
TSTR selects operation/stoppage for channels 0 to 5. When setting the operating mode in TMDR
or setting the count clock in TCR, first stop the TCNT counter.
Bit Bit Name
7, 6 —
5 CST5
4 CST4
3 CST3
2 CST2
1 CST1
0 CST0
Initial value R/W
All 0
—
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Description
Reserved
The write value should always be 0.
Counter Start 5 to 0
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but
the TIOC pin output compare output level is retained.
If TIOR is written to when the CST bit is cleared to 0,
the pin output level will be changed to the set initial
output value.
0: TCNT_5 to TCNT_0 count operation is stopped
1: TCNT_5 to TCNT_0 performs count operation
Rev. 6.00 Jul 19, 2006 page 581 of 1136
REJ09B0109-0600