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M16C65_15 Datasheet, PDF (86/115 Pages) Renesas Technology Corp – RENESAS MCU | |||
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M16C/65 Group
5. Electrical Characteristics
Memory Expansion Mode and Microprocessor Mode
(in wait state setting 2 Ï + 3 Ï, 2 Ï + 4 Ï, 3Ï + 4 Ï, and 4 Ï + 5 Ï, and
when inserting 1 to 3 recovery cycles and accessing external area)
Read timing
tcyc
BCLK
td(BCLK-CS)
25ns(max.)
CSi
ADi
BHE
td(BCLK-AD)
25ns(max.)
td(BCLK-ALE)
15ns(max.)
th(BCLK-ALE)
-4ns(min.)
ALE
RD
DBi
Hi-Z
td(BCLK-RD)
25ns(max.)
tac4(RD-DB)
(n à tcyc -45)ns(max.)
tsu(DB-RD)
40ns(min.)
VCC1 = VCC2 = 5V
th(BCLK-CS)
0ns(min.)
th(BCLK-AD)
0ns(min.)
th(RD-AD)
(m à tcyc+0)ns(min.)
th(BCLK-RD)
0ns(min.)
th(RD-DB)
0ns(min.)
Write timing
tcyc
BCLK
td(BCLK-CS)
25ns(max.)
CSi
td(BCLK-AD)
25ns(max.)
ADi
BHE
td(BCLK-ALE)
15ns(max.)
th(BCLK-ALE)
-4ns(min.)
ALE
WR, WRL
WRH
Hi-Z
DBi
td(BCLK-WR)
25ns(max.)
td(BCLK-DB)
40ns(max.)
th(BCLK-CS)
0ns(min.)
th(BCLK-AD)
0ns(min.)
th(WR-AD)
(m à tcyc -10)ns(min.)
th(BCLK-WR)
0ns(min.)
th(BCLK-DB)
0ns(min.)
1
tcyc = f(BCLK)
Measuring conditions
y VCC1 = VCC2 = 5V
y Input timing voltage: VIL = 0.8 V, VIH = 2.0 V
y Output timing voltage: VOL = 0.4 V, VOH = 2.4 V
td(DB-WR)
(n à tcyc -40)ns(min.)
th(WR-DB)
(m à tcyc -10)ns(min.)
n: 3 (when 2 Ï + 3 Ï)
4 (when 2 Ï + 4 Ï or 3 Ï + 4 Ï)
5 (when 4 Ï + 5 Ï)
m: 1 (when 1 recovery cycle inserted )
2 (when 2 recovery cycles inserted)
3 (when 3 recovery cycles inserted)
Figure 5.19 Timing Diagram
R01DS0031EJ0210 Rev.2.10
Jul 31, 2012
Page 86 of 111
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