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M16C65_15 Datasheet, PDF (83/115 Pages) Renesas Technology Corp – RENESAS MCU | |||
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M16C/65 Group
5. Electrical Characteristics
VCC1 = VCC2 = 5 V
Switching Characteristics
(VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified)
5.2.4.4 In Wait State Setting 2Ï + 3Ï, 2Ï + 4Ï, 3Ï + 4Ï, and 4Ï + 5Ï, and When
Accessing External Area
Table 5.41 Memory Expansion Mode and Microprocessor Mode (in Wait State Setting 2 Ï + 3 Ï, 2 Ï
+ 4Ï, 3Ï + 4Ï, and 4Ï + 5Ï, and When Accessing External Area)
Symbol
Parameter
Measuring
Condition
Standard
Min.
Max.
Unit
td(BCLK-AD) Address output delay time
25
ns
th(BCLK-AD) Address output hold time (in relation to BCLK)
0
ns
th(RD-AD)
Address output hold time (in relation to RD)
0
ns
th(WR-AD)
Address output hold time (in relation to WR)
(Note 2)
ns
td(BCLK-CS) Chip select output delay time
25
ns
th(BCLK-CS) Chip select output hold time (in relation to BCLK)
0
ns
td(BCLK-ALE) ALE signal output delay time
15
ns
th(BCLK-ALE)
td(BCLK-RD)
ALE signal output hold time
RD signal output delay time
See
-4
ns
Figure 5.14
25
ns
th(BCLK-RD) RD signal output hold time
0
ns
td(BCLK-WR) WR signal output delay time
25
ns
th(BCLK-WR) WR signal output hold time
0
ns
td(BCLK-DB) Data output delay time (in relation to BCLK)
40
ns
th(BCLK-DB) Data output hold time (in relation to BCLK) (3)
0
ns
td(DB-WR)
Data output delay time (in relation to WR)
(Note 1)
ns
th(WR-DB)
Data output hold time (in relation to WR) (3)
(Note 2)
ns
Notes:
1. Calculated according to the BCLK frequency as follows:
-(--n----â-----0---.-5----)---Ã-----1---0---9- â 40[ns]
f(BCLK)
n is 3 for 2Ï + 3Ï, 4 for 2Ï + 4Ï, 4 for 3Ï + 4Ï, and 5 for 4Ï + 5Ï.
2. Calculated according to the BCLK frequency as follows:
0----.-5----Ã-----1---0----9 â 10[ns]
f(BCLK)
3. This standard value shows the timing when the output is off,
and does not show hold time of data bus.
Hold time of data bus varies with capacitor volume and pull-up
(pull-down) resistance value.
Hold time of data bus is expressed in
t = âCR Ã ln(1 â VOL/VCC2)
by a circuit of the right figure.
For example, when VOL = 0.2VCC2, C = 30 pF, R = 1 kΩ, hold
time of output low level is
t = â30 pF à 1 kΩ à In(1 â 0.2VCC2/VCC2)
= 6.7 ns.
R
DBi
C
R01DS0031EJ0210 Rev.2.10
Jul 31, 2012
Page 83 of 111
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