HAT2210R Datasheet, PDF (7/12 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET with Schottky Barrier Diode High Speed Power Switching

HAT2210R, HAT2210RJ
• MOS2 & Schottky Barrier Diode
Power vs. Temperature Derating
4.0
Test Condition :
When using the glass epoxy board
(FR4 40x40x1.6 mm), PW < 10 s
3.0
2.0
1.0
0
50
100
150
200
Ambient Temperature Ta (°C)
Typical Output Characteristics
20
4.5 V
Pulse Test
10 V
3.0 V
2.8 V
10
2.6 V
V_GS = 2.4 V
0
5
10
Drain to Source Voltage V_DS (V)
Drain to Source Saturation Voltage vs
Gate to Source Voltage
200
Pulse Test
150
100
I_D = 5 A
50
2A
1A
0
2 4 6 8 10 12
Gate to Source Voltage V_GS (V)
Maximum Safe Operation Area
1000
100
10 µs
10
PW ^{1 ms100 µs}
1
0.1
=
DC _Operation
Operation in
(PW
this area is
limited by R_DS(on)
10 _{ms (1shot)}
≤ ₁^N₀o_{ste) 5}
Ta = 25°C
0.01 ^{1 shot Pulse}
0.1
1
10
100
Drain to Source Voltage V_DS (V)
Note 5 :
When using the glass epoxy board
(FR4 40x40x1.6 mm)
Typical Transfer Characteristics
20
V_DS = 10 V
Pulse Test
10
Tc = 75°C
25°C
−25°C
0
2
4
6
8
10
Gate to Source Voltage V_GS (V)
Static Drain to Source on State Resistance
vs. Drain Current
100
Pulse Test
V_GS = 4.5 V
10 V
10
1
0.1
1
10
100
Drain Current I_D (A)
Rev.3.00, Mar.15.2005, page 7 of 11