4507 Datasheet, PDF (7/115 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4507 Group
PORT BLOCK DIAGRAMS
Register Y
SD instruction
RD instruction
Skip decision
Decoder (SZD instruction)
CLD
instruction
S
RQ
(Note 1)
D0, D1, D4, D5
Register Y
SD instruction
RD instruction
Decoder
Key-on wakeup
CLD
instruction
SCP instruction
K22
“L” level
detection circuit
Skip decision
(SZD instruction)
Skip decision
S
(SNZCP
instruction)
RQ
S
RCP instruction R Q
Pull-up
transistor
PU22
(Note 1)
D2/C (Note 2)
Register Y
SD instruction
RD instruction
Decoder
Key-on wakeup
Pull-up
transistor
K23
“L” level
detection circuit
PU23
CLD
instruction
Skip decision
(SZD instruction)
IAK instruction
S
Register A
RQ
A0 D
(Note 1)
D3/K (Note 2)
OKA instruction
TQ
Port block diagram (1)
Notes 1:
This symbol represents a parasitic diode on the port.
2: Applied potential to ports D2/C and D3/K must be VDD or less.
Rev.3.01 2005.02.04 page 7 of 111
REJ03B0107-0301