4507 Datasheet, PDF (112/115 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

REVISION DESCRIPTION LIST
4507 GROUP DATA SHEET
Rev.
No.
1.0 First Edition
Revision Description
1.1 Pages 3, 4, 22, 38 : Character fonts errors revised
2.0 The 4506/4507 Group data sheet is separated.
Page 10: Port block diagram (3); Block diagram of P12/CNTR pin revised.
Page 26: Fig. 22 Timers structure; Block diagram of P12/CNTR pin revised.
Page 29: (9) Precautions → (8) Precautions
(8) Timer input/output pin (P12/CNTR pin) added.
Fig. 23 added.
Page 30: WATCHDOG TIMER revised all.
Page 31: Fig. 24 → Fig. 25, Fig. 25 → Fig. 26
Fig. 26 NOP instruction added. POF → POF2
Page 38: Table 14 Port state at reset; D4, D5 added to Function at reset.
Page 49: Fig. 46 POF → POF2
Page 61: BL p, a, BLA p instructions revised.
Page 62: BML p, a, BMLA p instructions revised.
Page 77: TABP p instruction revised.
Page 90: TABP p instruction revised.
Page 92: BL p, a, BLA p, BML p, a, BMLA p instructions revised.
Page 100: BL, BML, BLA, BMLA instructions; The second word revised.
Page 101: BL, BML, BLA, BMLA instructions; The second word revised.
Page 102: ABSOLUTE MAXIMUM RATINGS; VDD –0.3 to 6.0 → –0.3 to 6.5
Page 104: RECOMMENDED OPERATING CONDITIONS 1;
Operating condition map added.
Rev.
date
000808
000905
010531
(1/3)