SH74593_15 Datasheet, PDF (5/38 Pages) Renesas Technology Corp – RENESAS MCU

SH74593
2. Details
Page
12-12
12-12
Description
• 12.3.6 Flash P/E Mode Entry Register (FENTRYR)
Product
Description
SH74562 To specify the P/E mode for the ROM so that the FCU can accept commands, set the FENTRY0
bit to "1".
SH74592 To specify the P/E mode for the ROM so that the FCU can accept commands, set either of bits
FENTRY1 and FENTRY0 to "1".
• 12.3.6 Flash P/E Mode Entry Register (FENTRYR) : Description of FEKEY bit
Product Description
SH74562 These bits enable or disable FENTRY0 bit modification. The data written to these bits are not
retained. These bits are always read as "0".
H'AA: Enable FENTRY0 bit modification.
Other than H'AA: Disable FENTRY0 bit modification.
SH74593 These bits enable or disable bit modification of FENTRY1 and FENTRY0. The data written to
these bits are not retained. These bits are always read as "0".
H'AA: Enable bit modification of FENTRY1 and FENTRY0.
Other than H'AA: Disable bit modification of FENTRY1 and FENTRY0.
• 12.3.6 Flash P/E Mode Entry Register (FENTRYR) : Description of FENTRY1 bit
Product R W Description
SH74562 0 0 ROM P/E Mode Entry Bit 1
This bit is not supported by the MCU. Always write "0" to FENTRY1.
SH74593 R W ROM P/E Mode Entry Bit 1
These bits specify the P/E mode for the EB20 to EB23 blocks of ROM
(read addresses: H'0010 0000 to H'0017 FFFF; program/erase
addresses: H'FD90 0000 to H'FD97 FFFF).
0: The block of ROM from EB20 to EB23 (0.5Mbytes) is in read mode
1: The block of ROM from EB20 to EB23 (0.5Mbytes) is in P/E mode
Programming is enabled when the following conditions are all satisfied:
- The FWE bit in the FPMON register is "1".
- The FRDY bit in the FSTATR0 register is "1".
- H'AA is written to the FEKEY bit in word access.
[Conditions for clearing to "0"]
- The FRDY bit in the FSTATR0 register becomes "1" and the FWE bit
in the FPMON register becomes "0".
- This register is written to in byte access.
- A value other than H'AA is written to the FEKEY bit in word access.
- "0" is written to FENTRY1 while the write enabling conditions are
satisfied.
- The FENTRYR register is written to while the FENTRYR register is
not H'0000 and the write enabling conditions are satisfied.
[Condition for setting to "1"]
- "1" is written to the FENTRY1 bit while the write enabling conditions
are satisfied and the FENTRYR register is H'0000.
12-19
Please refer to Appendix D.4.
• Table 12.5 FCU Command Format: Description of Legend
Product RA: ROM program/erase address
SH74562 When the FENTRY0 bit is "1": An address in the range from H'FD80 0000 to H'FD8F FFFF
SH74593 When the FENTRY0 bit is "1": An address in the range from H'FD80 0000 to H'FD8F FFFF
When the FENTRY1 bit is "1": An address in the range from H'FD90 0000 to H'FD97 FFFF
R01DS0186EJ0120 Rev.01.20
Sep 10, 2012
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