SH74593_15 Datasheet, PDF(15/38 Page) Renesas Technology Corp

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SH74593_15 Datasheet, PDF (15/38 Pages) Renesas Technology Corp – RENESAS MCU

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SH74593

Appendix C.4

Section 11 Address Space

Appendix C

32-bit virtual address space

via CPU

H'C000 0000

H'C017 FFFF

H'C018 0000

H'C3FF FFFF

H'C400 0000

H'C7FF FFFF

H'C800 0000

H'CBFF FFFF

H'CC00 0000

H'CFFF FFFF

H'D000 0000

P3 area

(512 Mbytes)

H'D3FF FFFF

H'D400 0000

H'D7FF FFFF

H'D800 0000

H'D807 FFFF

H'D808 0000

H'DBFF FFFF

H'DC00 0000

H'DFFF FFFF

Area 0

29-bit physical address space

Single chip

Internal ROM

(1.5 Mbyte)

Reserved

Area 1

Area 2

Area 3

Reserved

Area 4

Area 5

Area 6

Area 7

SHwyRAM

(512 Kbytes)

Reserved

Note: Â· The CPU, DMAC, AUDR, and other modules cannot access a reserved area.

But the CPU can access area 7 as a control register area using the MMU.

Figure 11.5 Address Space (P3 Area)

R01DS0186EJ0120 Rev.01.20

Sep 10, 2012

Page 15 of 35

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