H8SX1650 Datasheet, PDF (399/692 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 9 16-Bit Timer Pulse Unit (TPU)
9.8.2 Interrupt Signal Timing
(1) TGF Flag Setting Timing in Case of Compare Match
Figure 9.38 shows the timing for setting of the TGF flag in TSR by compare match occurrence,
and the TGI interrupt request signal timing.
Pφ
TCNT input
clock
TCNT
N
N+1
TGR
N
Compare match
signal
TGF flag
TGI interrupt
Figure 9.38 TGI Interrupt Timing (Compare Match)
(2) TGF Flag Setting Timing in Case of Input Capture
Figure 9.39 shows the timing for setting of the TGF flag in TSR by input capture occurrence, and
the TGI interrupt request signal timing.
Pφ
Input capture
signal
TCNT
N
TGR
N
TGF flag
TGI interrupt
Figure 9.39 TGI Interrupt Timing (Input Capture)
Rev.2.00 Jun. 28, 2007 Page 377 of 666
REJ09B0311-0200