M32C8B_09 Datasheet, PDF (36/69 Pages) Renesas Technology Corp – RENESAS MCU

M32C/8B Group
5. Electrical Characteristics
Table 5.4
Symbol
f(CPU)
f(XIN)
f(XCIN)
f(Ring)
f(PLL)
tsu(PLL)
Recommended Operating Conditions (3/3)
(VCC1 = VCC2 = 3.0 to 5.5 V, Topr = -20 to 85°C unless otherwise specified)
Parameter
Standard
Min.
Typ.
Max.
CPU clock frequency
VCC1 = 3.0 to 5.5V
0
32
(same frequency as f(BCLK))
Main clock input frequency
VCC1 = 3.0 to 5.5V
0
16
Sub clock frequency
32.768
50
On-chip oscillator frequency
0.5
1
2
PLL clock frequency
VCC1 = 3.0 to 5.5V
10
32
Wait time to stabilize PLL frequency
VCC1 = 5.0V
20
synthesizer
VCC1 = 3.3V
50
Unit
MHz
MHz
kHz
MHz
MHz
ms
ms
Table 5.5
Flash Memory Electrical Characteristics (VCC1 = VCC2 = 3.0 V to 5.5 V,
Topr = 0 to 60°C unless otherwise specified)
Symbol
Parameter
Standard
Measurement Condition
Unit
Min. Typ. Max.
−
CPU clock frequency (in CPU rewrite mode)⁽²⁾
10 MHz
−
Erase and program endurance⁽¹⁾
100
times
−
Program time (4 bytes) (Topr = 25°C)
Other than Data flash
Data flash
150 900
μs
300 1700
−
Lock bit program time
Other than Data flash
Data flash
70 500
μs
140 1000
−
Block erase time (Topr = 25°C)
4-Kbyte block
0.2 3
s
8-Kbyte block
0.2 3
s
64-Kbyte block
0.2 3
s
tps
Wait time to stabilize flash memory circuit
50
μs
−
Data hold time (Topr = -40 to 85°C)
10
years
NOTES:
1. If erase and program endurance is n times (n = 100), each block can be erased n times. For example, if a 4-
Kbyte block A is erased after programming four-byte data 1,024 times, each to a different address, this counts
as one erase and program time. Data cannot be programmed to the same address more than once without
erasing the block (rewrite prohibited).
2. Prior to accessing registers FMR0 to FMR3 or to entering CPU rewrite mode (EW0, EW1 mode), set the CPU
clock frequency to 10 MHz or lower using bits MCD4 to MCD0 in the MCD register, and also set the PM12 bit in
the PM1 register to 1 (1 wait state).
REJ03B0242-0100 Rev.1.00 Nov 01, 2009
Page 36 of 67