PD64A_15 Datasheet, PDF (28/66 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS FOR INFRARED REMOTE CONTROL TRANSMISSION

µPD64A, 65
6. RESET
The system is reset by the following occurrences.
• When the POC circuit has detected low-power voltage
• When the operand value is illegal or does not satisfy the precondition when the HALT instruction is executed
• When the accumulator is 0H when the RLZ instruction is executed
• When the stack pointer overflows or underflows
Table 6-1. Hardware Statuses After Reset
Hardware
PC (11 bits)
SP (1 bit)
Data
R0 = DP
memory R1 to RF
Accumulator (A)
Status flag (F)
Carry flag (CY)
Timer (10 bits)
Port register P0
P1
Control register P3
P4
• Reset by Internal POC Circuit in Operation
• Reset by Other Factor^{Note 1}
000H
0B
000H
Undefined
Undefined
0B
0B
000H
FFH
×××× 11×1B^{Note 2}
03H
26H
• Reset by Internal POC Circuit in
Standby Mode
Previous status retained
Notes 1. The following resets are available.
• Reset when executing the HALT instruction (when the operand value is illegal or does not satisfy
the precondition)
• Reset when executing the RLZ instruction (when A = 0)
• Reset by stack pointer overflow or underflow
2. Value according to the KI or S2 pin status.
In order to prevent malfunction, do not input a high level to all the KI0 to KI3 pins when POC is released
due to supply voltage startup (these pins can be left open. When leaving open, keep pull-down
resistors connected).
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Data Sheet U14380EJ3V0DS00