PD64A_15 Datasheet, PDF (22/66 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLERS FOR INFRARED REMOTE CONTROL TRANSMISSION

µPD64A, 65
4.2 Timer Operation
The timer starts (counting down) when a value other than 0 is set for the down counter with a timer operation
instruction. The timer operation instructions for making the timer start operation are shown below.
MOV T0, A
MOV T1, A
MOV T, #data10
MOV T, @R0
The down counter is decremented (–1) in the cycle of 64/fX or 128/fX^Note. If the value of the down counter becomes
0, the zero detector generates the timer operation end signal to stop the timer operation. At this time, if the timer
is in HALT mode (HALT #×101B) waiting for the timer to stop operation, the HALT mode is released and the
instruction following the HALT instruction is executed. The output of the timer operation end signal is continued
while the down counter is 0 and the timer is stopped. The following expression indicates the relationship between
the timer’s time and the down counter’s set value.
Timer time = (Set value + 1) × 64/fX (or 128/fX^Note)
Note This becomes 128/fX if bit 3 of control register 0 is set (1).
By setting the flag (t9) that enables the timer output to 1, the timer can output its operation status from the S1/
LED and REM pins. The REM pin can also output the carrier while the timer is in operation.
Table 4-1. Timer Output (When t9 = 1)
Timer operating
Timer halted
S1/LED Pin
L
H
REM Pin
H (or carrier output^Note)
L
Note The carrier is output if bit 2 of control register 0 is cleared (0).
Figure 4-2. Timer Output (When Carrier Is Not Output)
Timer value: (Set value + 1) × 64/fX (or 128/fX)
LED
REM
20
Data Sheet U14380EJ3V0DS00