PD44164095B_15 Datasheet, PDF (25/35 Pages) Renesas Technology Corp – 18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

μPD44164095B, μPD44164185B
SCAN Exit Order
Bit Signal name
no. x9
x18
1
C#
2
C
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
Q0
11
D0
12
NC
13
NC
14 NC
Q1
15 NC
D1
16
NC
17
NC
18 Q1
Q2
19 D1
D2
20
NC
21
NC
22 NC
Q3
23 NC
D3
24
NC
25
NC
26 Q2
Q4
27 D2
D4
28
ZQ
29
NC
30
NC
31 NC
Q5
32 NC
D5
33
NC
34
NC
35 Q3
Q6
36 D3
D6
Bump
ID
6R
6P
6N
7P
7N
7R
8R
8P
9R
11P
10P
10N
9P
10M
11N
9M
9N
11L
11M
9L
10L
11K
10K
9J
9K
10J
11J
11H
10G
9G
11F
11G
9F
10F
11E
10E
Bit Signal name Bump
no. x9
x18
ID
37
NC
10D
38
NC
9E
39 NC
Q7
10C
40 NC
D7
11D
41
NC
9C
42
NC
9D
43 Q4
Q8
11B
44 D4
D8
11C
45
NC
9B
46
NC
10B
47
CQ
11A
48
–
Internal
49
A
9A
50
A
8B
51
A
7C
52
A
6C
53
LD#
8A
54
NC
7A
55
BW0#
7B
56
K
6B
57
K#
6A
58
NC
5B
59 NC BW1# 5A
60
R, W#
4A
61
A
5C
62
A
4B
63
A
NC
3A
64
DLL#
1H
65
CQ#
1A
66 NC
Q9
2B
67 NC
D9
3B
68
NC
1C
69
NC
1B
70 NC
Q10
3D
71 NC
D10
3C
72
NC
1D
Bit Signal name Bump
no. x9
x18
ID
73
NC
2C
74 Q5
Q11 3E
75 D5
D11 2D
76
NC
2E
77
NC
1E
78 NC
Q12 2F
79 NC
D12
3F
80
NC
1G
81
NC
1F
82 Q6
Q13 3G
83 D6
D13 2G
84
NC
1J
85
NC
2J
86 NC
Q14 3K
87 NC
D14
3J
88
NC
2K
89
NC
1K
90 Q7
Q15
2L
91 D7
D15
3L
92
NC
1M
93
NC
1L
94 NC
Q16 3N
95 NC
D16 3M
96
NC
1N
97
NC
2M
98 Q8
Q17 3P
99 D8
D17 2N
100
NC
2P
101
NC
1P
102
A
3R
103
A
4R
104
A
4P
105
A
5P
106
A
5N
107
A
5R
R10DS0016EJ0200 Rev.2.00
October 6, 2011
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