PD44164095B_15 Datasheet, PDF (20/35 Pages) Renesas Technology Corp – 18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

μPD44164095B, μPD44164185B
Application Example
SRAM
Vt
Controller
R
Data In
Data Out
Address
LD#
R, W#
BW#
SRAM#1 CQ/CQ#
SRAM#4 CQ/CQ#
Source CLK/CLK#
ZQ
CQ#
SRAM#1
CQ
D
Q
A LD# R, W# BWx# C/C# K/K#
Vt
R
Vt
R
Return CLK/CLK#
Vt
R
R = 50 Ω Vt = Vref
R=
250 Ω
...
ZQ
CQ#
SRAM#4
CQ
D
Q
A LD# R, W# BWx# C/C# K/K#
Vt
R
Vt
R
R=
250 Ω
Remark AC Characteristics are defined at the condition of SRAM outputs, CQ, CQ# and Q with termination.
R10DS0016EJ0200 Rev.2.00
October 6, 2011
Page 20 of 34