HN58V256A Datasheet, PDF (16/25 Pages) Hitachi Semiconductor – 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A)

HN58V256A Series, HN58V257A Series
Functional Description
Automatic Page Write
Page-mode write feature allows 1 to 64 bytes of data to be written into the EEPROM in a single write cycle.
Following the initial byte cycle, an additional 1 to 63 bytes can be written in the same manner. Each
additional byte load cycle must be started within 30 µs from the preceding falling edge of WE or CE. When
CE or WE is high for 100 µs after data input, the EEPROM enters write mode automatically and the input
data are written into the EEPROM.
Data Polling
Data polling indicates the status that the EEPROM is in a write cycle or not. If EEPROM is set to read mode
during a write cycle, an inversion of the last byte of data outputs from I/O7 to indicate that the EEPROM is
performing a write operation.
RDY/Busy Signal (only the HN58V257A series)
RDY/Busy signal also allows the status of the EEPROM to be determined. The RDY/Busy signal has high
impedance except in write cycle and is lowered to V_OL after the first write signal. At the end of a write cycle,
the RDY/Busy signal changes state to high impedance.
RES Signal (only the HN58V257A series)
When RES is low, the EEPROM cannot be read or programmed. Therefore, data can be protected by keeping
RES low when V_CC is switched. RES should be high during read and programming because it doesn't provide
a latch function.
V_CC
4-5
Read inhibit
Read inhibit
Program inhibit
Program inhibit
Rev.5.00, Nov. 17.2003, page 16 of 22