TLK2211 Datasheet, PDF (14/21 Pages) Texas Instruments – ETHERNET TRANSCEIVERS

TLK2211
SLLS873B – MAY 2008 – REVISED JULY 2008 ................................................................................................................................................................ www.ti.com
Host
Protocol
Device
JTAG
Controller
3.3 V
5 Ω at 100 MHz
3.3 V
VDD VDDA
18
VDDPLL
0.01 mF
GND
GNDPLL ⁶⁴
GNDA
TLK2211
17
TESTEN
10
TD0−TD9
22
REFCLK
16
PRBSEN
19
LOOPEN
24
SYNCEN
TXP ⁶²
TXN ⁶¹
47 _SYNC/PASS
10
RD0−RD9
2
RBC0−RBC1
28
ENABLE
RXP ⁵⁴
26 _LOS
32
RBCMODE
R_t 50 Ω
Controlled Impedance
Transmission Line
Controlled Impedance
Transmission Line
Controlled Impedance
Transmission Line
49
TCK
55
JTMS
48
JTDI
56
JTRSTN
27 _JTDO
R_t
RXN ⁵²
50 Ω
Controlled Impedance
Transmission Line
Figure 10. Typical Application Circuit (AC Mode)
DESIGNING WITH PowerPAD
The TLK2211 is housed in a high performance, thermally enhanced, 64-pin VQFP (RCP64) PowerPAD package.
Use of the PowerPAD package does not require any special considerations except to note that the PowerPAD,
which is an exposed die pad on the bottom of the device, is a metallic thermal and electrical conductor.
Therefore, if not implementing PowerPAD PCB features, the use of solder masks (or other assembly techniques)
may be required to prevent any inadvertent shorting by the exposed PowerPAD of connection etches or vias
under the package. It is strongly recommended that the PowerPAD be soldered to the thermal land. The
recommended convention, however, is to not run any etches or signal vias under the device, but to have only a
grounded thermal land as explained below. Although the actual size of the exposed die pad may vary, the
minimum size required for the keep out area for the 64-pin PFP PowerPAD package is 8 mm × 8 mm.
It is recommended that there be a thermal land, which is an area of solder-tinned-copper, underneath the
PowerPAD package. The thermal land varies in size depending on the PowerPAD package being used, the PCB
construction, and the amount of heat that needs to be removed. In addition, the thermal land may or may not
contain numerous thermal vias depending on PCB construction.
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