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TLK2211 Datasheet, PDF (11/21 Pages) Texas Instruments – ETHERNET TRANSCEIVERS
TLK2211
www.ti.com ................................................................................................................................................................ SLLS873B – MAY 2008 – REVISED JULY 2008
TRANSMITTER/RECEIVER CHARACTERISTICS
V(cm)
CI
t(TJ)
t(DJ)
tr, tf
PARAMETER
Vod = |TxP–TxN|
Transmit common mode voltage range
Receiver Input voltage requirement,
Vid = |RxP - RxN|
Receiver common mode voltage range,
(RxP + RxN)/2
Receiver input capacitance
Serial data total jitter (peak-to-peak)
Serial data deterministic jitter (peak-to-peak)
Differential signal rise, fall time (20% to 80%)
Serial data jitter tolerance minimum required
eye opening, (per IEEE-802.3 specification)
Receiver data acquisition lock time from
powerup
TEST CONDITIONS
Rt = 50 Ω
Rt = 75 Ω
Rt = 50 Ω
Rt = 75 Ω
Differential output jitter, Random +
deterministic, PRBS pattern,
Rω = 125 MHz
Differential output jitter, PRBS pattern,
Rω = 125 MHz
RL = 50 Ω, CL = 4 pF,
See Figure 5 and Figure 6
Differential input jitter, Random +
deterministic,
Rω = 125 MHz
Data relock time from loss of synchronization
td(Tx latency)
td(Rx latency)
Tx latency
Rx latency
TBI modes
TBI modes
See Figure 1
See Figure 4
MIN
1000
1300
1400
1400
TYP
1600
1900
1600
1600
MAX
2000
2800
1850
1800
UNIT
mV
mV
200
1600 mV
1400 1590 1785 mV
2 pF
0.24 UI
0.10 UI
80
305 ps
0.25
UI
500 µs
3750
19
25
Bit
times
24 UI
35 UI
TX+
tr
80% ∼ V
50%
20% ∼ V
tf
80% ∼ V
TX−
50%
20% ∼ V
tf
tr
80%
VOD
20%
∼ 1V
0V
∼ −1V
Figure 5. Differential and Common-Mode Output Voltage
Definitions
CL
5 pF
CL
5 pF
50 Ω
50 Ω
Figure 6. Transmitter Test Setup
CLOCK
1.4 V
tr
tf
DATA
tr
80%
50%
20%
tf
2V
0.8 V
Figure 7. TTL Data I/O Valid Levels for AC Measurement
Copyright © 2008, Texas Instruments Incorporated
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