HYS72D64301 Datasheet, PDF(6/51 Page) Qimonda AG – 184 - Pin Registered Double-Data-Rate SDRAM Module

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

HYS72D64301 Datasheet, PDF (6/51 Pages) Qimonda AG – 184 - Pin Registered Double-Data-Rate SDRAM Module

◁

Internet Data Sheet

HYS72D[64/128/256]xxx[G/H]BRâ[5/6/7]âB

Registered DDR SDRAM Module

2

Pin Configuration

The pin configuration of the Registered DDR SDRAM DIMM

is listed by function in Table 4 (184 pins). The abbreviations

used in columns Pin and Buffer Type are explained in Table 5

and Table 6 respectively. The pin numbering is depicted in

Figure 1.

Pin#

Name

Clock Signals

137

CK0

138

CK0

21

CKE0

111

CKE1

NC

Control Signals

157

S0

158

S1

NC

154

RAS

65

CAS

63

WE

10

RESET

Address Signals

59

BA0

52

BA1

48

A0

43

A1

41

A2

130

A3

37

A4

32

A5

Pin

Type

I

I

I

I

NC

I

I

NC

I

I

I

I

I

I

I

I

I

I

I

I

Buffer Function

Type

SSTL

SSTL

SSTL

SSTL

SSTL

Clock Signal

Complement Clock

Clock Enable Rank 0

Clock Enable Rank 1

Note: 2-rank module

Note: 1-rank module

SSTL

SSTL

â

SSTL

SSTL

SSTL

LV-

CMOS

Chip Select of Rank 0

Chip Select of Rank 1

Note: 2-ranks module

Note: 1-rank module

Row Address Strobe

Column Address Strobe

Write Enable

Register Reset

SSTL

SSTL

SSTL

SSTL

SSTL

SSTL

SSTL

SSTL

Bank Address Bus 1:0

Address Bus 11:0

TABLE 4

Pin Configuration of RDIMM

Rev. 1.42, 2007-01

6

03292006-7CZA-YS85

▷