HYS72D64301 Datasheet, PDF (5/51 Pages) Qimonda AG – 184 - Pin Registered Double-Data-Rate SDRAM Module

Internet Data Sheet
HYS72D[64/128/256]xxx[G/H]BR–[5/6/7]–B
Registered DDR SDRAM Module
Product Type¹⁾²⁾
TABLE 3
Ordering information for Lead - Free (RoHS Complaint) Products
Compliance Code³⁾
Description
SDRAM
Technology
PC3200 (CL=3)
HYS72D64301HBR–5–B
PC3200R–30331–A0
one rank 512 MByte Reg. ECC DIMM
512 MBit (×8)
HYS72D128300HBR–5–B
PC3200R–30331–C0
one rank 1 GByte Reg. ECC DIMM
512 MBit (×4)
HYS72D128321HBR–5–B
PC3200R–30331–B0
two ranks 1 GByte Reg. ECC DIMM
512 MBit (×8)
HYS72D256220HBR–5–B
PC3200R–30331–D0
two ranks 2 GByte Reg. ECC DIMM
512 MBit (×4)
HYS72D256320HBR–5–B
PC3200R–30331–F0
two ranks 2 GByte Reg. ECC DIMM
512 MBit (×4)
PC2700 (CL=2.5)
HYS72D64301HBR–6–B
PC2700R–25330–A0
one rank 512 MByte Reg. ECC DIMM
512 MBit (×8)
HYS72D128300HBR–6–B
PC2700R–25330–C0
one rank 1 GByte Reg. ECC DIMM
512 MBit (×4)
HYS72D128321HBR–6–B
PC2700R–25330–B0
two ranks 1 GByte Reg. ECC DIMM
512 MBit (×8)
HYS72D256220HBR–6–B
PC2700R–25330–D0
two ranks 2 GByte Reg. ECC DIMM
512 MBit (×4)
HYS72D256320HBR–6–B
PC2700R–25330–F0
two ranks 2 GByte Reg. ECC DIMM
512 MBit (×4)
PC2100 (CL=2)
HYS72D128300HBR–7–B
PC2100R–20330–C0
one rank 1 GByte Reg. ECC DIMM
512 MBit (×4)
HYS72D128321HBR–7–B
PC2100R–20330–B0
two ranks 1 GByte Reg. ECC DIMM
512 MBit (×8)
HYS72D256220HBR–7–B
PC2100R–20330–D0
two ranks 2 GByte Reg. ECC DIMM
512 MBit (×4)
HYS72D256320HBR–7–B
PC2100R–20330–F0
two ranks 2 GByte Reg. ECC DIMM
512 MBit (×4)
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
2) All product types end with a place code designating the silicon-die revision. Reference information available on request.
Example: HYS72D128300GBR-5-B, indicating Rev.B die are used for SDRAM components.
3) The Compliance Code is printed on the module labels and describes the speed sort (for example “PC2100R”), the latencies (for example
“20330” means CAS latency of 2.0 clocks, Row-Column-Delay (RCD) latency of 3 clocks and Row Pre-charge latency of 3 clocks), JEDEC
SPD code definition version 0, and the Raw Card used for this module.
Rev. 1.42, 2007-01
5
03292006-7CZA-YS85