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HYS72D64301 Datasheet, PDF (24/51 Pages) Qimonda AG – 184 - Pin Registered Double-Data-Rate SDRAM Module
Product Type
Internet Data Sheet
HYS72D[64/128/256]xxx[G/H]BR–[5/6/7]–B
Registered DDR SDRAM Module
Organization
Label Code
JEDEC SPD Revision
Byte#
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Description
tAC SDRAM @ CLmax (Byte 18) [ns]
Error Correction Support
Refresh Rate
Primary SDRAM Width
Error Checking SDRAM Width
tCCD [cycles]
Burst Length Supported
Number of Banks on SDRAM Device
CAS Latency
CS Latency
Write Latency
DIMM Attributes
Component Attributes
tCK @ CLmax -0.5 (Byte 18) [ns]
tAC SDRAM @ CLmax -0.5 [ns]
tCK @ CLmax -1 (Byte 18) [ns]
tAC SDRAM @ CLmax -1 [ns]
tRPmin [ns]
tRRDmin [ns]
tRCDmin [ns]
tRASmin [ns]
Module Density per Rank
tAS, tCS [ns]
tAH, tCH [ns]
tDS [ns]
Rev. 1.42, 2007-01
03292006-7CZA-YS85
512MB
1 GByte
1 GByte
2 GByte
×72
×72
×72
×72
1 Rank (×8) 1 Rank (×4) 2 Ranks (×8) 2 Ranks (×4)
PC3200R– PC3200R– PC3200R– PC3200R–
30331
30331
30331
30331
Rev. 1.0
Rev. 1.0
Rev. 1.0
Rev. 1.0
HEX
50
02
82
08
08
01
0E
04
1C
01
02
26
C1
60
50
75
50
3C
28
3C
28
80
60
60
40
HEX
50
02
82
04
04
01
0E
04
1C
01
02
26
C1
60
50
75
50
3C
28
3C
28
01
60
60
40
HEX
50
02
82
08
08
01
0E
04
1C
01
02
26
C1
60
50
75
50
3C
28
3C
28
80
60
60
40
HEX
50
02
82
04
04
01
0E
04
1C
01
02
26
C1
60
50
75
50
3C
28
3C
28
01
60
60
40
24