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HYS72D64301 Datasheet, PDF (17/51 Pages) Qimonda AG – 184 - Pin Registered Double-Data-Rate SDRAM Module
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Product Type
Internet Data Sheet
HYS72D[64/128/256]xxx[G/H]BR–[5/6/7]–B
Registered DDR SDRAM Module
TABLE 12
IDD Specification for HYS72D[64/128/256]xxx[G/H]BR–6–B
Unit Note/ Test Conditions1) 2)
Organization 512 MB
1 GB
1 GB
2 GB
×72
×72
×72
×72
1 Rank
1 Rank
2 Ranks
2 Ranks
–6
–6
–6
–6
Symbol
Typ. Max. Typ. Max. Typ. Max. Typ. Max.
IDD0
1130 1320 2060 2380 1700 1940 3190 3620 mA 3)
IDD1
1340 1540 2360 2690 1910 2160 3490 3930 mA 3)4)
IDD2P
380 400 610 690 610 690 1140 1260 mA 5)
IDD2F
780 880 1250 1400 1250 1400 2200 2440 mA 5)
IDD2Q
480 580 890 1050 890 1050 1690 1980 mA 5)
IDD3P
430 500 780 890 780 890 1480 1660 mA 5)
IDD3N
870 980 1430 1600 1430 1600 2560 2840 mA 5)
IDD4R
1270 1450 2210 2510 1840 2070 3340 3750 mA 3)4)
IDD4W
1310 1500 2290 2600 1870 2110 3420 3840 mA 3)
IDD5
2010 2360 3920 4590 2570 2970 5050 5820 mA 3)
IDD6
350 390 600 680 600 680 1150 1270 mA 5)
IDD7
2440 2880 5040 5910 3250 3770 6170 7150 mA 3)4)
1) Test condition for maximum values: VDD = 2.7 V, TA = 10 °C
2) Module IDD is calculated on the basis of component IDD and includes Register and PLL currents
3) The module IDD values are calculated from the component IDD decathlete values are:
n * IDD×[component] for single bank modules (n: number of components per module bank)
n * IDD×[component] + n * IDD3N[component] for two bank modules (n: number of components per module bank)
4) DQ I/O (IDDQ) currents are not included into calculations: module IDD values will be measured differently depending on load conditions
5) The module IDD values are calculated from the component IDD decathlete values are:
n * IDD×[component] for single bank modules (n: number of components per module bank)
2 * n * IDD×[component] for single two bank modules (n: number of components per module bank)
Rev. 1.42, 2007-01
17
03292006-7CZA-YS85
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