HYB18T512161B2F Datasheet, PDF(6/37 Page) Qimonda AG

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HYB18T512161B2F Datasheet, PDF (6/37 Pages) Qimonda AG – 512-Mbit x16 DDR2 SDRAM

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Internet Data Sheet

HYB18T512161B2Fâ20/25

512-Mbit Double-Data-Rate-Two SDRAM

Ball#

Data Signals

Data Strobe

Data Mask

Name

BA0

BA1

A10

A11

A12

Ball

Type

Buffer

Type

SSTL

Function

Bank Address Bus 1:0

Address Signal 12:0, Address Signal 10/Autoprecharge

DQ0

I/O

DQ1

I/O

DQ2

I/O

DQ3

I/O

DQ4

I/O

DQ5

I/O

DQ6

I/O

DQ7

I/O

DQ8

I/O

DQ9

I/O

DQ10

I/O

DQ11

I/O

DQ12

I/O

DQ13

I/O

DQ14

I/O

DQ15

I/O

SSTL

Data Signal 15:0

Note: Bi-directional data bus. DQ[15:0]

UDQS I/O

LDQS I/O

SSTL

Data Strobe Upper Byte

Note: UDQS corresponds to the data on DQ[15:8]

Data Strobe Lower Byte

Note: LDQS corresponds to the data on DQ[7:0]

Rev. 1.1, 2007-06

05152007-ZYAH-ACMZ

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