HYS72T512022EP Datasheet, PDF (28/36 Pages) Qimonda AG – 240-Pin Dual Die Registered DDR2 SDRAM Modules

Internet Data Sheet
4
SPD Codes
HYS72T[512/1G]0x2EP–[3S/3.7]–B
Registerd DDR2 SDRAM Module
This chapter lists all hexadecimal byte values stored in the EEPROM of the products described in this data sheet. SPD stands
for serial presence detect. All values with XX in the table are module specific bytes which are defined during production.
List of SPD Code Tables
• Table 20 “HYS72T512022EP-[3S/3.7]-B” on Page 28
Product Type
Organization
Label Code
JEDEC SPD Revision
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Description
Programmed SPD Bytes in EEPROM
Total number of Bytes in EEPROM
Memory Type (DDR2)
Number of Row Addresses
Number of Column Addresses
DIMM Rank and Stacking Information
Data Width
Not used
Interface Voltage Level
t_CK @ CL_MAX (Byte 18) [ns]
t_AC SDRAM @ CL_MAX (Byte 18) [ns]
Error Correction Support (non-ECC, ECC)
Refresh Rate and Type
Primary SDRAM Width
Error Checking SDRAM Width
Not used
Burst Length Supported
Number of Banks on SDRAM Device
Supported CAS Latencies
DIMM Mechanical Characteristics
DIMM Type Information
DIMM Attributes
TABLE 20
HYS72T512022EP-[3S/3.7]-B
HYS72T512022EP–3S–B HYS72T512022EP–3.7–B
4 GByte
4 GByte
×72
×72
2 Ranks (×4)
2 Ranks (×4)
PC2–5300P–555
PC2–4200P–444
Rev. 1.2
Rev. 1.2
HEX
80
08
08
0E
0B
71
48
00
05
30
45
06
82
04
04
00
0C
08
38
01
01
05
HEX
80
08
08
0E
0B
71
48
00
05
3D
50
06
82
04
04
00
0C
08
38
01
01
05
Rev. 1.0, 2007-03
28
03292007-RHOW-C5L6