HYB25D256800CE Datasheet, PDF (21/39 Pages) Qimonda AG – 256-Mbit Double-Data-Rate SDRAM

Internet Data Sheet
HY[B/I]25D256[16/40/80]0C[E/C/F/T](L)
256 Mbit Double-Data-Rate SDRAM
9) Concurrent Auto Precharge: This device supports “Concurrent Auto Precharge”. When a read with auto precharge or a write with auto
precharge is enabled any command may follow to the other banks as long as that command does not interrupt the read or write data
transfer and all other limitations apply (e.g. contention between READ data and WRITE data must be avoided). The minimum delay from
a read or write command with auto precharge enable, to a command to a different banks is summarized in Table 15.
10) A Write command may be applied after the completion of data output.
From Command
WRITE w/AP
Read w/AP
To Command (different bank)
Read or Read w/AP
Write to Write w/AP
Precharge or Activate
Read or Read w/AP
Write or Write w/AP
Precharge or Activate
TABLE 15
Truth Table 5: Concurrent Auto Precharge
Minimum Delay with Concurrent Auto Unit
Precharge Support
1 + (BL/2) + t_WTR
t_CK
BL/2
t_CK
1
t_CK
BL/2
t_CK
CL (rounded up) + BL/2
t_CK
1
t_CK
Rev. 2.3, 2007-03
21
03062006-8CCM-VPUW