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HYB25DC512800C Datasheet, PDF (16/35 Pages) Qimonda AG – 512-Mbit Double-Data-Rate SDRAM
Internet Data Sheet
HYB25DC512[800/160]C[E/F]
512-Mbit Double-Data-Rate SDRAM
Current State CKE n-1 CKEn
Command n
TABLE 11
Truth Table 2: Clock Enable (CKE)
Action n
Note
Previous Current
Cycle
Cycle
Self Refresh L
Self Refresh L
L
X
H
Deselect or NOP
Maintain Self-Refresh
1)
Exit Self-Refresh
2)
Power Down L
L
X
Maintain Power-Down
Power Down L
H
Deselect or NOP
Exit Power-Down
All Banks Idle H
L
Deselect or NOP
Precharge Power-Down Entry
All Banks Idle H
L
AUTO REFRESH
Self Refresh Entry
Bank(s) Active H
L
Deselect or NOP
Active Power-Down Entry
H
H
See Table 12
–
1) VREF must be maintained during Self Refresh operation
2) Deselect or NOP commands should be issued on any clock edges occurring during the Self Refresh Exit (tXSNR) period. A minimum of 200
clock cycles are needed before applying a read command to allow the DLL to lock to the input clock.
1. CKEn is the logic state of CKE at clock edge n: CKE n-1 was the state of CKE at the previous clock edge.
2. Current state is the state of the DDR SDRAM immediately prior to clock edge n.
3. COMMAND n is the command registered at clock edge n, and ACTION n is a result of COMMAND n.
4. All states and sequences not shown are illegal or reserved.
TABLE 12
Truth Table 3: Current State Bank n - Command to Bank n (same bank)
Current State CS RAS CAS WE Command
Action
Note
Any
H X X X Deselect
NOP. Continue previous operation.
1)2)3)4)5)6)
L H H H No Operation
NOP. Continue previous operation.
1) to 6)
Idle
L
L
H
H Active
Select and activate row
1) to 6)
L L L H AUTO REFRESH –
1) to 7)
L L L L MODE REGISTER –
SET
1) to 7)
Row Active
L
H
L
H Read
Select column and start Read burst
1) to 6), 8)
L H L L Write
Select column and start Write burst
1) to 6), 8)
L L H L Precharge
Deactivate row in bank(s)
1) to 6), 9)
Read (Auto L H L H Read
Precharge
Disabled)
L L H L Precharge
L H H L BURST
TERMINATE
Select column and start new Read burst
Truncate Read burst, start Precharge
BURST TERMINATE
1) to 6), 8)
1) to 6), 9)
1) to 6), 10)
Write (Auto L H L H Read
Precharge
Disabled)
L H L L Write
L L H L Precharge
Select column and start Read burst
Select column and start Write burst
Truncate Write burst, start Precharge
1) to 6), 8), 11)
1) to 6), 8)
1) to 6), 9), 11)
1) This table applies when CKE n-1 was HIGH and CKE n is HIGH (see Table 11 and after tXSNR/tXSRD has been met (if the previous state
was self refresh).
Rev. 1.3, 2006-12
16
03292006-W2FE-ELDX