HYS64T128020EML-3S-B Datasheet, PDF (13/39 Pages) Qimonda AG – 214-Pin Unbuffered DDR2 SDRAM MicroDIMM Modules Low Power

Preliminary Internet Data Sheet
HYS64T128020EML-[3S/3.7/5]-B
Unbuffered DDR2 SDRAM MicroDIMM Modules
Parameter
Symbol
Values
TABLE 9
Supply Voltage Levels and DC Operating Conditions
Unit Note
Min.
Typ.
Max.
Device Supply Voltage
V_DD
1.7
1.8
1.9
V
Output Supply Voltage
V_DDQ
1.7
1.8
1.9
V
1)
Input Reference Voltage
V_REF
0.49 × V_DDQ
0.5 × V_DDQ
0.51 × V_DDQ
V
2)
SPD Supply Voltage
V_DDSPD
1.7
—
3.6
V
DC Input Logic High
V_IH(DC)
V_REF + 0.125 —
V_DDQ + 0.3
V
DC Input Logic Low
V_{IL (DC})
– 0.30
—
V_REF – 0.125
V
In / Output Leakage Current
I_L
–5
—
5
µA
3)
1) Under all conditions, V_DDQ must be less than or equal to V_DD
2) Peak to peak AC noise on V_REF may not exceed ± 2% V_REF (DC).V_REF is also expected to track noise in V_DDQ.
3) Input voltage for any connector pin under test of 0 V ≤ V_IN ≤ V_DDQ + 0.3 V; all other pins at 0 V. Current is per pin
Parameter
Symbol
Values
TABLE 10
Operating Conditions
Unit
Note
Min.
Max.
Operating temperature (ambient)
DRAM Case Temperature
Storage Temperature
Barometric Pressure (operating & storage)
T_OPR
T_CASE
T_STG
PBar
0
0
– 50
+69
+65
+95
+100
+105
°C
°C
°C
kPa
1)2)3)4)
5)
Operating Humidity (relative)
H_OPR
10
90
%
1) DRAM Component Case Temperature is the surface temperature in the center on the top side of any of the DRAMs.
2) Within the DRAM Component Case Temperature Range all DRAM specifications will be supported
3) Above 85 °C DRAM Case Temperature the Auto-Refresh command interval has to be reduced to t_REFI = 3.9 µs
4) When operating this product in the 85 °C to 95 °C T_CASE temperature range, the High Temperature Self Refresh has to be enabled by
setting EMR(2) bit A7 to “1”. When the High Temperature Self Refresh is enabled there is an increase of I_DD6 by approximately 50%.
5) Up to 3000 m.
Rev. 0.5, 2007-05
13
05212007-7F24-MITO