HYB18TC256160AF_1 Datasheet, PDF (10/55 Pages) Qimonda AG – 256-Mbit Double-Data-Rate-Two SDRAM DDR2 SDRAM

Addressing
Configuration
Bank Address
Number of Banks
Auto-Precharge
Row Address
Column Address
Number of Column Address Bits
Number of I/Os
Page Size [Bytes]
1) Referred to as ’org’
2) Referred to as ’colbits’
3) PageSize = 2^colbits × org/8 [Bytes]
Internet Data Sheet
HYB18TC256160AF
256-Mbit Double-Data-Rate-Two SDRAM
16Mb x 16¹⁾
BA[1:0]
4
A10 / AP
A[12:0]
A[8:0]
9
16
1024 (1K)
TABLE 8
DDR2 Addressing for ×16 Organization
Note
2)
3)
Rev. 1.20, 2007-04
10
03062006-H3V1-XJT4