PE33241_14 Datasheet, PDF (9/19 Pages) Peregrine Semiconductor – UltraCMOS® Integer-N PLL Frequency Synthesizer

PE33241
Product Specification
Typical Performance Data @ 25°C, V_DD = 2.8V, f_C = 50 MHz and F_IN = 3 GHz, unless otherwise noted
Figure 10. FOM vs. Input Power
(5/6 Prescaler)
Figure 11. FOM vs. Input Power
(10/11 Prescaler)
‐220
‐220
‐230
‐230
‐240
‐250
‐260
Floor FOM
Flicker FOM
‐240
‐250
‐260
Floor FOM
Flicker FOM
‐270
‐270
‐280
‐20
‐15
‐10
‐5
0
5
Input Power (dBm)
‐280
‐20
‐15
‐10
‐5
0
5
Input Power (dBm)
Figure
12.
Input Sensitivity vs.
(5/6 Prescaler, V_DD =
F2_I.N65aVnd)1
Temp
0
‐5
‐40°C
‐10
+25°C
+85°C
‐15
‐20
‐25
‐30
800
1000
3000
3100
F_IN (MHz)
3900
4000
Note 1: Input sensitivity is the minimum input power level required for the
PLL to maintain lock. Operating at these levels does not guarantee
the SSB phase noise performance in Table 5
Figure
13.
Input Sensitivity
(10/11 Prescaler,
vVs_D._DF=_{IN2a.6n5dVT)1}emp
0
‐40°C
‐5
+25°C
+85°C
‐10
‐15
‐20
‐25
‐30
F_IN (MHz)
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