PM5316 Datasheet, PDF (345/491 Pages) PMC-Sierra, Inc – Quad Channel 155 Mbit/s SONET/SDH Framer and Aligner

SONET/SDH Payload Extractor/Aligner (SPECTRA-4x155)
Production
Note: This register bit should only be used when the TPPS is configured as a slave.
Otherwise, it should normally be set low.
LOPCONE
The loss of pointer concatenation (LOPCON) interrupt enable bit enables interrupt generation
on output INTB by the auxiliary LOPCON interrupt status.
Note: This register bit should only be used when the TPPS is configured as a slave.
Otherwise, it should normally be set low.
Proprietary and Confidential to PMC-Sierra, Inc. and for its customers’ internal use
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Document ID: PMC-1990822, Issue 4