PM5316 Datasheet, PDF (243/491 Pages) PMC-Sierra, Inc – Quad Channel 155 Mbit/s SONET/SDH Framer and Aligner

SONET/SDH Payload Extractor/Aligner (SPECTRA-4x155)
Production
Register 10B4H: SPECTRA-4x155 Add Bus Parity Interrupt Status
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R
R
R
R
R
R
R
R
Function
API1
API2
API3
API4
Reserved
Reserved
Reserved
Reserved
Default
X
X
X
X
X
X
X
X
This register reports the parity interrupt status of the SPECTRA-4x155 Telecom Add buses #1
(AD[7:0]), #2 (AD[15:8]), #3 (AD[23:16]) and #4 (AD[31:24]).
Reserved
The Reserved read bits must be ignored when reading then in the SPECTRA-4X155.API1-4
The Add bus parity interrupt status (APIm) bit reports parity error events detected at the
corresponding Add bus. APIm is set high on detection of a parity error event on the
corresponding Add bus. This bit and the interrupt are cleared when this register is read. The
occurrence of parity error events is an indication of mis-configured parity
generation/detection or actual hardware problem at the Add bus input.
Proprietary and Confidential to PMC-Sierra, Inc. and for its customers’ internal use
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Document ID: PMC-1990822, Issue 4