PM5316 Datasheet, PDF (341/491 Pages) PMC-Sierra, Inc – Quad Channel 155 Mbit/s SONET/SDH Framer and Aligner

SONET/SDH Payload Extractor/Aligner (SPECTRA-4x155)
Production
Registers 1190H, 1290H, 1390H, 1490H, 1590H, 1690H, 1790H, 1890H, 1990H, 1A90H,
1B90H, 1C90H: TPPS Path AIS Control
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
LOMTUAIS
TPAIS_EN
Reserved
Reserved
LOPPAIS
PAISPAIS
LOPCONPAIS
PAISCONPAIS
Default
0
0
0
0
0
0
0
0
This register controls the auto assertion of transmit path/TU AIS. These register bits should
normally be set low when the TPPS is configured as a slave unless indicated otherwise.
PAISCONPAIS
When set high, the PAISCONPAIS bit enable path AIS insertion on the transmit stream when
path AIS concatenation event is detected. When this bit is set low, the corresponding event
has no effect on the transmit stream.
Note: This register bit should only be used when the RPPS is configured as a slave.
Otherwise, it should normally be set low.
LOPCONPAIS
When set high, the LOPCONPAIS bit enable path AIS insertion on the transmit stream when
loss of concatenated pointer (LOPCON) event is detected. When this bit is set low, the
LOPCON event has no effect on the transmit stream.
Note: This register bit should only be used when the TPPS is configured as a slave.
Otherwise, it should normally be set low.
PAISPAIS
When set high, the PAISPAIS bit enables path AIS insertion on the transmit stream when path
AIS is detected on the Add bus. When PAISPAIS is set low, path AIS events have no effect on
the transmit stream.
Proprietary and Confidential to PMC-Sierra, Inc. and for its customers’ internal use
322
Document ID: PMC-1990822, Issue 4